Unlike standard computer memory (random access memory or RAM) in which the user supplies a memory address and the RAM returns the data word stored at that address, a CAM is designed such that the user supplies a data word and the CAM searches its entire memory to see if that data word is stored anywhere in it. If the data word is found, the CAM returns a list of one or more storage addresses where the word was found (and in some architectures, it also returns the data word).
Because a CAM is designed to search its entire memory in a single operation, it is much faster than RAM in virtually all search applications. There are cost disadvantages to CAM however. Unlike a normal RAM chip which have simple storage cells, each individual memory bit in a CAM must have its own embedded "match circuit". Additionally the match outputs from each cell in the data word must be cascaded together with additional circuitry to yield a complete data word match signal. These additional circuits increase the physical size of the CAM chip which exponentially adds to manufacturing cost. Power dissipation is also considerably greater. Thus CAM is only used in specialized applications where searching speed cannot be achieved in any other way.
Architectural Variants
Binary CAM is the simplest type of CAM which uses data search words comprised entirely of 1s and 0s. Tertiary CAM is a more advanced type which allows a third matching state of "X" or "Don't Care" for one or more bits in the dataword, thus adding flexibility to the search (for example a tertiary CAM might have a search word of "1101XX010"). The added search flexibility comes at an additional cost penalty over binary CAM, however, as the internal memory cell must now encode three possible states instead of the two of binary CAM. This is typically achieved by adding an additional "care" or "don't care" storage bit to every memory cell.Example Application
An example application for content addressable memory is in the design of a communication router which bridges an Ethernet local area network, or LAN, to the internet. The computers on the LAN broadcast onto a single shared Ethernet cable, each computer identifying its data packets with a 48 bit MAC address signature. The router must sort out these packets and route them to appropriate internet protocol addresses, which are comprised of 32 bits. Speed is very important in this application as a single router must handle the combined two-way traffic of all the computers on the LAN. The solution is to use content addressable memory in combination with low-cost RAM (either SRAM or DRAM). When a data packet arrives from a local computer the router searches for its MAC address in a CAM lookup table. Using the address returned by the CAM, the router retrieves the corresponding internet IP address from the RAM chip and now knows where to send the data. Traffic going the other way uses another CAM and DRAM pair to decode IP addresses into MAC addresses. An alternate design would be to use a single tertiary CAM which contains a mix of IP and MAC addresses and a corresponding RAM holding destination addresses.